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Bolo
Joined: 05 Dec 2017
Posts: 727
Location: 506F6C616E64
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 Posted: Fri Jun 23, 2023 14:07 Post subject: New Read Retry for 0x89d40c32 (QLC) - TP
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Implementation with instruction sended to Serg (Top Page RR)
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Сергей
Joined: 26 Aug 2005
Posts: 20282
Flash-Extractor developer
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Posted: Sat Jun 24, 2023 18:52 Post subject:
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Thank you very much
New regs added to Micron v4
In:
FE_1187
NR_566
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HDDRCVR
Joined: 29 Sep 2015
Posts: 462
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Posted: Mon Jun 26, 2023 18:19 Post subject:
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jeremyb
Joined: 09 Dec 2008
Posts: 1950
Location: RecoverMyFlashDrive.com Bridgeport, CT, USA
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Posted: Tue Jun 27, 2023 4:02 Post subject:
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Can we get instructions on it's use in FE?
Attempt 1:
2c d4 0c 32 - No Plot
Attempt 2:
2c d4 0c 32 - Plots but no major difference in quality
Attempt 3:
2c a3 60 32 - Plots but no major difference in quality
Find Saddle has no effect, tune has no effect except for Register 00
I know that Micron v4 modifies Micron v1 presets.
I'm using a custom adapter with DQS support and "special low voltage" support down to 0.7v so I should be good for DDR3. Library works on Micron v1 & v2 so I know Set Features is working (ie: DQS Mod). Also Micron v4 improvements seem to be VERY dependent on where in a block you are working on.
I can make the final result look much worse using Micron v4, so I know its doing "something"
Thanks
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Bolo
Joined: 05 Dec 2017
Posts: 727
Location: 506F6C616E64
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Posted: Tue Jun 27, 2023 11:30 Post subject:
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Those full registers are works and fully tested only on Intel 89d40c32 (SDR mode - no DQS required).
Before using Micron v4 (Voltage offsets) you must use Micron v2 (Read Retry) - we will soon record movie on this. So in simple steps:
1) Run Micron v2 - find best RR for ONLY first register 0x89 and set second register 0x96 to 0x01
2) Run Micron v4 - find best Offsets based on previously found RR, Tune
3) Read Memory with Micron v2 (!!!!)
IMPORTANT: After use Micron v4 DON'T disconnect NR
P.S
Your chips that you mention are Micron DDR3 so require DQS and settings for those are litlle diffrent.
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Сергей
Joined: 26 Aug 2005
Posts: 20282
Flash-Extractor developer
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Posted: Tue Jun 27, 2023 15:54 Post subject:
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This is too complex
May be add more registers to v4?
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Bolo
Joined: 05 Dec 2017
Posts: 727
Location: 506F6C616E64
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Posted: Tue Jun 27, 2023 17:07 Post subject:
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rather add v5 - I send you message on Skype
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jeremyb
Joined: 09 Dec 2008
Posts: 1950
Location: RecoverMyFlashDrive.com Bridgeport, CT, USA
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Posted: Tue Jun 27, 2023 17:43 Post subject:
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| Bolo wrote: | | Those full registers are works and fully tested only on Intel 89d40c32 (SDR mode - no DQS required). |
| Bolo wrote: | | Your chips that you mention are Micron DDR3 so require DQS and settings for those are litlle diffrent. |
This is a little misleading as in your video description it clearly states Micron QLC 2c d4 0c 32 & 89 d4 0c 32 These chips are N28A based which are DDR3 only, so how do you claim SDR? They are the same chip. From my research some older Micron TLC NAND (Micron v3) will work in both SDR, DDR2, and DDR3 depending on the bootup voltage (1.2, 1.8, 3.3) Is this what you mean by SDR, boot-up voltage? If that is the case what voltage are you using? From my research anything above 2.3v causes N28A chips to power down.
| Сергей wrote: | This is too complex
May be add more registers to v4? |
I think Bolo's methodology is correct, I don't think you can "Add more registers"
| Bolo wrote: | | rather add v5 |
I think the registers are correct, I don't think v5 is necessary. However either the implementation is wrong or they don't do anything useful.
Sorry if I seem critical, I've been working on this RR for a long time.
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| New Registers... Plots but ECC line is everywhere. Also switches from Page 3 to Page 2.. Where as all registers "should" control a different page. Old Micron v4 had this same problem. |
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| Old Registers... This is what I'd expect to see from the ECC line. As Ones and Diff level out ECC Green starts to spike, level out, and go down. |
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jeremyb
Joined: 09 Dec 2008
Posts: 1950
Location: RecoverMyFlashDrive.com Bridgeport, CT, USA
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Posted: Tue Sep 19, 2023 3:06 Post subject:
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Micron v4 doesn't appear to fully work with
2c 2c d3 1c 32 c6
Some planes are improved but most aren't
I know these are temperature sensitive but I've yet to find any chip which Micron v4 provides a 100% usable solution.
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